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vexriscv_mem_mapped_aes128
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A VexRiscv with AES128 on the memory mapped bus. Works in simulation and on the ULX3S.
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vexriscv_mem_mapped_aes128/ulx3s/PQVexRiscvUlx3s.ys

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read_verilog PQVexRiscvUlx3s.v
synth_ecp5 -json PQVexRiscvUlx3s.json