Thorsten
  • Joined on Nov 16, 2020
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GF180_Tour
0 0

A quick tour around the GF180 chips.

Updated 1 year ago

vexriscv_mem_mapped_aes128
Verilog 0 0

A VexRiscv with AES128 on the memory mapped bus. Works in simulation and on the ULX3S.

Updated 4 years ago

vexriscv_mem_mapped_example
C 0 0

Updated 4 years ago