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@ -5,25 +5,25 @@ Use the Virtual Machine 1.5 from: |
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[https://random-oracles.org/risc-v/](https://random-oracles.org/risc-v/) |
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### Starting the Vexriscv Simulation |
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Open console, change to folder 'vexriscv' and run |
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Open console, change to folder `vexriscv` and run |
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``` |
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sbt "runMain mupq.PQVexRiscvSim" |
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``` |
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### Connecting openocd-vexriscv |
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Open new console, change to folder 'vexriscv' and run |
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''' |
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Open new console, change to folder `vexriscv` and run |
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``` |
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openocd-vexriscv -f vexriscvsim.cfg |
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''' |
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``` |
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### Compile and run the C code |
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Open new console (the third one), change to folder 'c_project' and compile the project: |
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''' |
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Open new console (the third one), change to folder `c_project` and compile the project: |
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``` |
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make |
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''' |
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``` |
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Then load the created ELF file into the simulation via GDB: |
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''' |
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``` |
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riscv64-unknown-elf-gdb -tui -ex 'set remotetimeout 15' -ex 'target remote :3333' -ex 'load' -ex 'break main' -ex 'continue' main |
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''' |
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``` |
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Set some more breakpoints and step through the code with 'c' (continue). You will see the UART output in console 1 (vexriscv sim). |
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