tested mem-mapped example for sim and ulx3s

c_project/main.c

@@ -1,29 +1,29 @@
 #include <stdbool.h>
 #include "hal.h"
 
-// typedef struct {
-//     volatile uint32_t state;
-// } My_Mem;
+typedef struct {
+    volatile uint32_t state;
+} My_Mem;
 
-// #define MY_MEM ((My_Mem*)(0xF0030000))
+#define MY_MEM ((My_Mem*)(0xF0030000))
 
 int main(void)
 {
     printf("HELLO WORLD\n");
 
     uint32_t state = 10000;
-    // uint32_t state_return;
+    uint32_t state_return;
 
     while (1)
     {
         printf("State in : %i\n", state);
 
-        // MY_MEM->state = state;
-        // state_return = MY_MEM->state;
+        MY_MEM->state = state;
+        state_return = MY_MEM->state;
 
         state = state + 1;
 
-        printf("State out: %i\n", state);
+        printf("State out: %i\n", state_return);
     }
     return 0;
 }

ulx3s/PQVexRiscvUlx3s.v

@@ -1,5 +1,5 @@
 // Generator : SpinalHDL v1.4.0    git head : ecb5a80b713566f417ea3ea061f9969e73770a7f
-// Date      : 27/01/2021, 14:47:17
+// Date      : 27/01/2021, 14:59:39
 // Component : PQVexRiscvUlx3s
 
 

ulx3s/PQVexRiscvUlx3s_yosys.log

@@ -6583,7 +6583,7 @@ ABC: Participating nodes from the first network   =    2143. (  76.62 % of nodes
 ABC: Participating nodes from the second network  =    2332. (  83.38 % of nodes)
 ABC: Node pairs (any polarity)                    =    2143. (  76.62 % of names can be moved)
 ABC: Node pairs (same polarity)                   =    1679. (  60.03 % of names can be moved)
-ABC: Total runtime =     0.27 sec
+ABC: Total runtime =     0.26 sec
 ABC: + write_blif <abc-temp-dir>/output.blif 
 
 2.44.1.2. Re-integrating ABC results.
@@ -7798,6 +7798,6 @@ Found and reported 0 problems.
 2.51. Executing JSON backend.
 
 Warnings: 1 unique messages, 2 total
-End of script. Logfile hash: 86ff1874c2, CPU: user 11.28s system 0.12s, MEM: 316.02 MB peak
+End of script. Logfile hash: 9d1af2f165, CPU: user 10.90s system 0.10s, MEM: 316.18 MB peak
 Yosys 0.9+3855 (git sha1 54294957, clang 10.0.0-4ubuntu1 -fPIC -Os)
 Time spent: 16% 1x abc (2 sec), 15% 28x opt_clean (2 sec), ...

vexriscv/PQVexRiscvUlx3s.v

@@ -1,5 +1,5 @@
 // Generator : SpinalHDL v1.4.0    git head : ecb5a80b713566f417ea3ea061f9969e73770a7f
-// Date      : 27/01/2021, 14:47:17
+// Date      : 27/01/2021, 14:59:39
 // Component : PQVexRiscvUlx3s