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vexriscv_mem_mapped_example
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vexriscv_mem_mapped_example/c_project/bsp/vexriscv/murax.ld

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working c for ulx3s and sim
4 years ago
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  1. OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv")
  2. OUTPUT_ARCH(riscv)
  3. 

  4. ENTRY( _start )
  5. 

  6. MEMORY
  7. {
  8.   ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 8k
  9. }
  10. 

  11. INCLUDE volatile.ld