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  1. # vexriscv_mem_mapped_example
  2. This is a very simple example for using the APB3 memory mapped bus inside the Vexriscv.
  3. The purpose is learning the mechanics of connecting larger extensions to the Vexriscv.
  4. ### Tools:
  5. Use the Virtual Machine 1.5 from:
  6. [https://random-oracles.org/risc-v/](https://random-oracles.org/risc-v/)
  7. ### Starting the Vexriscv Simulation
  8. Open console, change to folder `vexriscv` and run
  9. ```
  10. sbt "runMain mupq.PQVexRiscvSim"
  11. ```
  12. ### Connecting openocd-vexriscv
  13. Open new console, change to folder `vexriscv` and run
  14. ```
  15. openocd-vexriscv -f vexriscvsim.cfg
  16. ```
  17. ### Compile and run the C code
  18. Open new console (the third one), change to folder `c_project` and compile the project:
  19. ```
  20. make
  21. ```
  22. Then load the created ELF file into the simulation via GDB:
  23. ```
  24. riscv64-unknown-elf-gdb -tui -ex 'set remotetimeout 15' -ex 'target remote :3333' -ex 'load' -ex 'break main' -ex 'continue' main
  25. ```
  26. Set some more breakpoints `b <line>` and step through the code with `c` (continue). You will see the UART output in console 1 (vexriscv sim).