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vexriscv_mem_mapped_aes128
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A VexRiscv with AES128 on the memory mapped bus. Works in simulation and on the ULX3S.
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vexriscv_mem_mapped_aes128/vexriscv/vexriscvsim.cfg

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4 years ago
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  1. # Adapt this to your favourite FTDI-based debugger
  2. source [find interface/jtag_tcp.cfg]
  3. 

  4. # The Murax target needs a YAML file, even if it is empty
  5. set MURAX_CPU0_YAML cpu0.yaml
  6. 

  7. # The Murax target should work for all PQVexRiscv based chips
  8. source [find target/murax.cfg]