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vexriscv_mem_mapped_example
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17 Commits (5e6247a4d5e17e569fe400615bf55e7520100234)
 

Author SHA1 Message Date
  Thorsten Knoll 5e6247a4d5 reworked Makefiles, project structure and unified the codebase 4 years ago
  Thorsten Knoll 5ab026d2b7 the XOR module works with ULX3S too! 4 years ago
  Thorsten Knoll 933b52ef64 struct(C) and bundle(spinal) now equal and w/r enabled from both sides 4 years ago
  Thorsten Knoll 935ecd63f3 bigger mem on the bus (128 bit) 4 years ago
  Thorsten Knoll d5c6abcc24 init file for RAM 4 years ago
  Thorsten Knoll d7b372a437 tested mem-mapped example for sim and ulx3s 4 years ago
  Thorsten Knoll eae126e771 cleaned project for C in sim and ulx3s 4 years ago
  Thorsten Knoll 78b34dd5dd working c for ulx3s and sim 4 years ago
  Thorsten Knoll a0e1fdb88b update readme 4 years ago
  Thorsten Knoll c44cd23483 update readme 4 years ago
  Thorsten Knoll e4e90fd17e update readme 4 years ago
  Thorsten Knoll 01cfcc4630 update readme 4 years ago
  Thorsten Knoll 52e9f966d8 update readme 4 years ago
  Thorsten Knoll 5df08904e9 update readme 4 years ago
  Thorsten Knoll 44866906b4 first tiny mem-mapped example is working 4 years ago
  Thorsten Knoll b9cccf90a0 added MyMem template 4 years ago
  Thorsten ce9f47ec27 Initial commit 4 years ago