A VexRiscv with AES128 on the memory mapped bus. Works in simulation and on the ULX3S.
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  1. ## Vexriscv with AES128 ECB on the memory mapped bus
  2. ### Prerequisites:
  3. 1. All the Tools. Best served with the QuantumRisc Virtual Machine:
  4. https://random-oracles.org/risc-v/
  5. 2. The SpinalHDL Crypto project must be installed in your system. Follow the instructions from the Git README (its really simple):
  6. https://github.com/SpinalHDL/SpinalCrypto/wiki/Getting-started
  7. ### In the simulation:
  8. From inside the folder ```vexriscv``` start the simulation with
  9. ```
  10. sbt "runMain quantumrisc.PQVexRiscvSim"
  11. ```
  12. Connect ```openocd-vexriscv``` to the simulation. Therefore open a new console,
  13. navigate again to the ```vexriscv``` folder and go with
  14. ```
  15. openocd-vexriscv -f vexriscvsim.cfg
  16. ```
  17. Now you might want to compile and upload the C code to the simulation.
  18. Compile the C project from inside the folder ```c_project``` with
  19. ```
  20. make PLATFORM=pqvexriscvsim
  21. ```
  22. The compilation has created a file with the name ```main.elf```.
  23. Upload this file via GDB to the simulation
  24. (from inside the folder ```c_project```) with
  25. ```
  26. riscv64-unknown-elf-gdb -tui -ex 'set remotetimeout 30' -ex 'target extended-remote :3333' -ex 'load' -ex 'break main' -ex 'continue' main.elf
  27. ```
  28. One breakpoint at the start of the main function is already set. You might want to set another one inside the While(1) loop. Mabye at line 70 with:
  29. ```
  30. b 70
  31. ```
  32. Continuing the next breakpoint works with ```c```.
  33. The UART output from the Vexriscv is visible in the first concolse, where you started the simulation.
  34. ### On the ULX3S Board:
  35. ```
  36. sbt "runMain quantumrisc.PQVexRiscvUlx3s"
  37. ```
  38. Copy the created ```*ulx3s.v``` verilog file and the memory files ```*ulx3s*.bin``` to the folder ```ulx3s```. From there run ```make``` to create the bitstream:
  39. ```
  40. make PQVexRiscvUlx3s.bit
  41. ```
  42. Flash the bitstream to the board:
  43. ```
  44. sudo fujprog PQVexRiscvUlx3s.bit
  45. ```
  46. The Vexrisc is now running on the ULX3S Board. Now connect ```openocd``` to it. To do that, you need an external JTAG Adapter. The one i'm using is a Adafruit TF232H.
  47. The description for the wiring is available in one of my other projects:
  48. https://github.com/ThorKn/vexriscv-ulx3s-simple-plugin
  49. This time you need a different configfile, contained in the ```vexriscv``` folder:
  50. ```
  51. sudo openocd-vexriscv -f tf2323h_openocd.cfg
  52. ```
  53. Build the C project for a different ```PLATFORM``` then before (in the sim):
  54. ```
  55. make PLATFORM=pqvexriscvulx3s
  56. ```
  57. Uploading via GDB and using GDB is the same as above:
  58. ```
  59. riscv64-unknown-elf-gdb -tui -ex 'set remotetimeout 30' -ex 'target extended-remote :3333' -ex 'load' -ex 'break main' -ex 'continue' main.elf
  60. ```
  61. To see the UART output you can use the UART interface from the ULX3S board. Just open a Terminal program of your choice (i.e. GTKTerm) and connect it over USB with the parameters ```115200 - 8 - N - 1```.