(Quick and short) Virtual Roundtrip through the GF180 Open-Source Chips

This document is a list of Open-Source Links to understand and examine the GF180 Open-Soruce Mikrochips. These chips were fabricated in 2023 and were payed by Google. Author: Thorsten Knoll Date: 07.12.2023 Licence: Copyleft, GPL v3.0, https://www.gnu.org/licenses/gpl-3.0.html

CMOS

Task: Make yourself comfortable with the layers of a CMOS transistor. Later on you will try to match the layers and their names in different documents (GF180 PDK) and tools (Klayout). https://en.wikipedia.org/wiki/CMOS

GlobalFoundry 180 (GF180) Open-Source PDK

Task: This is the documentation of the GF180 Open-Source PDK. It is the base for understanding the inside of the chips. Try to get a hang of the structure of the documentation. GF180 PDK Read the docs: https://gf180mcu-pdk.readthedocs.io/en/latest/

Task: You remember the layers (like nwell, polysilicon, metal1?). Try to make a match with the names and numbers in this layerlist. The numbers will appear later on in the tool KLayout. GF180 PDK, Layer List: https://gf180mcu-pdk.readthedocs.io/en/latest/physical_verification/design_manual/drm_04_1.html

Find the GDS in the TapeOut resources

TapeOut resources for all Google payed open-source shuttleruns: https://foss-eda-tools.googlesource.com/

Task: Download and unpack the GDS of the chip you have. On the chip-package is a Projectnumber engraved (like C5, D5, B3).

Step 1: GF180 Foundries list of projects. Take the Projectnumber and look up the Project-ID in the manifest csv. Make sure the name of the project matches with what you expect (example: C5, 023, tiny_user_project_74181_alu) https://foss-eda-tools.googlesource.com/third_party/shuttle/gf180mcu/mpw-000/foundry/

Step 2: Walk around in the Repo of the Design (Project-ID is the slotnumber). Try to find the folder /tapeout/outputs/gds/. Download the tarball of the gds and unpack. https://foss-eda-tools.googlesource.com/third_party/shuttle/gf180mcu/mpw-000/

Inspect and examine the GDS with KLayout

Task: Use the Open-Source tool KLayout to view the GDS file. Disable and enable single layers in the GDS, matching with the layerlist from the PDK docs. Zoom in and focus on a single standard cell. Zoom out to identify different areas of the chip. Identify (some of) these areas.

Step 1: Install KLayout. Get it here: https://www.klayout.de/build.html

Step 2: Open the unpacked GDS from the chip in KLayout. Make empty layers invisible. Match the non-empty layers with the docs of the PDK and the CMOS transistor layers. Try to find "The build order of the chip", according to the CMOS wiki.

Step 3: ToDo:

• Zoom In: Pick a single cell
• Zoom out: Caravel Risc-V parts (Next chapter?)
• User Wrapper and user area.

Efabless Caravel Risc-V

ToDo. https://caravel-harness.readthedocs.io/en/latest/ https://github.com/efabless/caravel

Problems: The caravel Risc-V development is fast, confusing and kinda mostly unstructured. There is a lot of deprecated information in the interwebs. I am not sure if i want to deal with that, as it feels like useless work to do. And the caravel on the GF180 chips did not get used for long.